A loop network consists of a high speed digital communication channel to which processors, peripherals, or terminals are attached through interfaces called ports. Messages, in these known systems, are sent from a source port in the form of addressed blocks of data that travel around the loop from interface to interface until picked-off by the destination port. It is a characteristic of the serial loop network that any port need serve as a driver for only the next port in the loop and is therefore not troubled with the time required to charge the distributed capacity of all of the open port switches of the network as in the common bus type of time division network.
Heretofore various serial loop arrangements have been proposed. Among the more well-known loop networks are the so-called Newhall loop, disclosed in U.S. Pat. No. 3,597,549, issued Aug. 3, 1971, and the so-called Pierce loop shown in U.S. Pat. No. 28,811, of May 11, 1976. Other types of loop networks are described in the article, "Simulation in a Class of Ring Structured Networks", Institute of Electrical and Electronics Engineers Transactions on Computers Vol. C-29, May 1980, pages 385-392.
The so-called Newhall loop has been described as a system in which a "control token" circulates around the loop and allows only one port at a time to transmit an arbitrary length message through the loop while the rest of the ports wait. This structure has the disadvantage that the queueing times of the ports are cumulative but each port is permitted to transmit a message which is fairly unrestricted as to length. The Pierce loop improves network line utilization through the use of fixed length time slots and allows each port to place a message "packet" into the first available time slot. A bit in the control field of each time slot specifies if that time slot is busy or idle. The Pierce loop has the advantage of allowing the use of different portions of the loop for the simultaneous transmission of different one-way messages. However, if two ports (a and b) on the Pierce loop are to be permitted to communicate fully, a time slot must be assigned for exclusive use by these two ports alone, and the time slot must then traverse the entire loop. Thus, even if the ports are adjacent to each other on the loop so that one part of the connection (a to b) involves only a single bit delay, the other part of the connection (b to a) takes the remainder of the frame interval. It would be of some advantage to increase the switching capacity (the ratio of effectively available time slots to ports) of the Pierce loop. It should be appreciated that, in a Pierce loop, in order for a port to be able to exchange its coded signal for the one being received in the time slot going around the loop, the loop delay must be padded-out to to exactly equal a frame interval, or multiple thereof. It would be of some advantage if the degree pad-out of required could somehow be lessened.
Other forms of loop network architecture are known which employ variable length shift registers at each port interface to accommodate the transmission of variable length messages. The maximum length of an output message that can be transmitted at any moment is determined by the available space in the delay buffer as described, for example, in the article by Reams and Liu entitled, "A Loop Network for Simultaneous Transmission of Variable Length Messages" in the Second Annual Symposium on Computer Architecture, Jan. 20-22, 1975, sponsored jointly by the IEEE Computer Society and the Association for Computer Machinery.
All of the foregoing loop networks are based on the assumptions that an individual port in the loop can be defined by a discrete address, that some of the bits of each message packet are devoted to addressing, and that an addressed port (or its loop interface) can recognize its address in the transmitted bit stream so that it can pick off the appropriate message destined for it. These prior art systems therefore require the use of an address decoder at each port or port interface. When a port is first installed in such a loop network, its address decoder must be set to the unique combination that will distinguish that port from all other ports in the network. While the setting of such a decoder is a conceptually easy matter involving simply the use of switches, solder-point strapping, or plug-in devices, the procedure suffers from several drawbacks. First it is necessary to obtain physical possession of the decoder to make the actual setting. This may necessitate a field trip to the port location, and, of course, settable circuits are subject to unauthorized tampering. Secondly, even the use of a factory adjustment means that the decoder unit cannot be fabricated as a completely sealed integrated circuit. Lastly, such a decoder must be designed to recognize its address word from the bit stream at the information bit rate. It would be most advantageous if a loop network could be provided in which the transmitted bit stream did not require an "address-per-packet", in which no physical setting of address decoders had to be made at any of the ports of the loop, and in which address decoding was not susceptible to unauthorized tampering. Further, it would be advantageous to permit each port to obtain access to as many time slots as the bandwidth of its message required and thereby, in effect, achieve the prior art goal of permitting variable length message transmission without undue complexity.
A question that must be answered in the design of a loop network employing assignable time slots is how does the system actually find and assign a time slot which is available over the span between the ports to be connected together. A system connection map could be maintained, and the common control (CC) could then search that map until a suitable time slot was found which it would then assign by addressing each port in the selected time slot. The complexity of a map which allows an indeterminate number of connections to be assigned to a given time slot makes this a rather cumbersome process as well as requiring a lot of fast acting random access memory and processing time. Some significant amount of maintenance and signal verification effort must also be used to insure that the map and the network remain in agreement. Accordingly, it would be advantageous to provide a communications system in which common control was not required to maintain a time slot usage map.